1. Field of the Invention
The invention relates to a transconductor and a mixer circuit and, in particular, to a mixer circuit with improved linearity.
2. Description of the Related Art
Mixer circuits for high frequency applications constructed using metal oxide semiconductor (MOS) transistors are subject to a limited voltage supply (usually less than 2V) and high levels of flicker noise, having frequencies extending up to several hundreds of KHz. Accordingly, the gain and output signal level required by such mixer circuits exceed those required in equivalent bipolar circuits.
FIG. 1 is a circuit diagram illustrating a conventional double balanced mixer circuit. The double balanced mixer circuit of FIG. 1 includes differential pairs of MOSFETs (Q131-Q132 and Q133-Q134). The drains of the pairs of MOSFETs are connected to an output terminal (Output-I+ and Output-I−). The gates of the pairs of MOSFETs are connected to first input terminals (Input-II+ and Input-II−). The double balanced mixer circuit in FIG. 1 also includes active devices Q135, Q136, Q137 and Q138. The sources of the MOSFET pair Q131-Q132 are connected to the drains of the active devices Q135 and Q136. The sources of the MOSFET pair Q133-Q134 are connected to the drains of the active devices Q137 and Q138. The gates of the active devices Q135, Q136, Q137 and Q138 are connected to the second input terminal (Input-I+ and Input-I−) through the input side biasing and matching circuits (Bias Network-I, Bias Network-II, Bias Network-III and Bias Network-IV, respectively). The sources of the active devices Q135, Q136, Q137 and Q138 are connected to the ground through an impedance unit (Degeneration Impedance) and Bias Network-V.
Two separate bias networks (Bias Network-I and Bias Network-II) are respectively provided for the MOSFETs Q135 and Q136, such that the gate to source bias voltages (Vgs) thereof are different. Due to the different gate to source bias voltages (Vgs), the MOSFETs Q135 and Q136 respectively operate in a saturation region and a sub-threshold region. However, complicated circuit design is required to maintain the device model operated in proper operation region to achieve non-linearity cancellation. Therefore the gate to source bias voltage (Vgs) applied to the circuit is limited to a small range.